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  ddr zero Datasheet PDF File

For ddr zero Found Datasheets File :: 606    Search Time::2.485ms    
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    AN1353

STMicroelectronics
Part No. AN1353
OCR Text ...guration registers pin name use ddr or dr pb0 not used 0 0 0 pb1 switch on the led / switch off the led 1 1 0/1 pb2 not existing for st6200 ...zero voltage crossing (zvc) events to have time infor-mation. the line voltage is connected to the ...
Description ASD ST62000C software description for cooling thermostat applicatons

File Size 116.11K  /  17 Page

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    ICS93V857 ICS93V857YG-025T ICS93V857YG-125T ICS93V857YG-130T ICS93V857YL-130T ICS93V857YL-025T ICS93V857YL-125T

Integrated Circuit Solution Inc
ICST[Integrated Circuit Systems]
Integrated Circuit Syst...
Part No. ICS93V857 ICS93V857YG-025T ICS93V857YG-125T ICS93V857YG-130T ICS93V857YL-130T ICS93V857YL-025T ICS93V857YL-125T
OCR Text ...Hz) Recommended Application: * ddr Memory Modules / zero Delay Board Fan Out * Provides complete ddr DIMM logic solution with ICSSSTV16857, ICSSSTV16859 or ICSSSTV32852 Product Description/Features: * Low skew, low jitter PLL clock driver ...
Description 2.5V Wide Range Frequency Clock Driver (33MHz - 233MHz) 2.5V的宽量程频率时钟驱动器(33MHz 233MHz

File Size 79.90K  /  10 Page

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    ICS93722 ICS93722YFLFT

ICST[Integrated Circuit Systems]
Part No. ICS93722 ICS93722YFLFT
OCR Text ddr Phase Lock Loop zero Delay Buffer Recommended Application: ddr zero Delay Clock Buffer Product Description/Features: * Low skew, low jitter PLL clock driver * I2C for functional and output control * Feedback pins for input to output sy...
Description Low Cost ddr Phase Lock Loop zero Delay Buffer

File Size 52.03K  /  6 Page

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    PCKV857 PCKV857DGG

Philips Semiconductors
NXP Semiconductors
Part No. PCKV857 PCKV857DGG
OCR Text ...mized for clock distribution in ddr (Double Data Rate) SDRAM applications as per JEDEC specifications * 1-to-10 differential clock distr...zero delay buffer designed for 2.5 V VDD and 2.5 V AVDD operation and differential data input and ou...
Description 70-190 MHz differential 1:10 clock driver

File Size 79.49K  /  12 Page

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    SPT774 SPT774CCJ SPT774CCN SPT774CCS SPT774BCS SPT774BCJ SPT774BCN

SPT
Fairchild Semiconductor
ETC[ETC]
List of Unclassifed Manufacturers
Part No. SPT774 SPT774CCJ SPT774CCN SPT774CCS SPT774BCS SPT774BCJ SPT774BCN
OCR Text ...R C t HS DB11-DB0 HIGH-Z ddr HDR HIGH-Z DATA VALID DB11-DB0 DATA VALID DATA VALID SPT SPT774 5 8/1/00 CIRCU...zero as explained in the next two sections. The gain adjustment should be done at positive full s...
Description FAST / COMPLETE 12-BIT UP COMPATIBLE A/D CONVERTER WITH SAMPLE/HOLD
FAST, COMPLETE 12-BIT UP COMPATIBLE A/D CONVERTER WITH SAMPLE/HOLD

File Size 113.61K  /  12 Page

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    CY28352 CY28352OXC CY28352OXCT CY28352OCT CY28352OC

ETC[ETC]
SpectraLinear Inc
Part No. CY28352 CY28352OXC CY28352OXCT CY28352OCT CY28352OC
OCR Text ddr SDRAM * 60- 200 MHz operating frequency * Phase-locked loop (PLL) clock distribution for double data rate synchronous DRAM applications ...zero delay buffer that distributes a clock input CLKIN to six differential pairs of clock outputs (C...
Description Differential Clock Buffer/Driver ddr400- and ddr333-Compliant

File Size 114.29K  /  7 Page

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    ICS93705 ICS93705YF-T

Integrated Circuit Systems
Part No. ICS93705 ICS93705YF-T
OCR Text ddr Phase Lock Loop zero Delay Clock Buffer Recommended Application: ddr zero Delay Clock Buffer Product Description/Features: * Low skew, low jitter PLL clock driver * I2C for functional and output control * Feedback pins for input to out...
Description ddr Phase Lock Loop zero Delay Clock Buffer

File Size 63.08K  /  7 Page

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    ASM3P2856A ASM3P2856AG-16-TR ASM3P2856AG-16-TT ASM3P2856B ASM3P2856BG-16-TR ASM3P2856BG-16-TT

http://
PulseCore Semiconductor
Part No. ASM3P2856A ASM3P2856AG-16-TR ASM3P2856AG-16-TT ASM3P2856B ASM3P2856BG-16-TR ASM3P2856BG-16-TT
OCR Text ...PLL based 3 = EMI Reduction 4 = ddr support products 5 = STD zero Delay Buffer 6 = Power Management 7 = Power Management 8 = Power Management 9 = Hi Performance 0 = Reserved U = MSOP E = TQFP L = LQFP U = MSOP P = PDIP D = QSOP X = SC-70 ...
Description Custom Clock generator for LCD Projector

File Size 352.93K  /  8 Page

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    LINER[Linear Technology]
Part No. LTC3413EFE LTC3413
OCR Text ddr/QDR Memory Termination FEATURES s s s s s s s s s s s s DESCRIPTIO High Efficiency: Up to 90% 3A Output Current Symmetrical So...zero-sense voltage (zero current). VFB (Pin 4): Feedback Pin. Receives the feedback voltage from the...
Description 3A, 2MHz Monolithic Synchronous Regulator for ddr/QDR Memory Termination

File Size 241.41K  /  16 Page

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